Many electronic devices include embedded systems having central processor units (CPUs) to control the operation of the device providing greatly enhanced functionality and operational flexibility. Typically, non-volatile memory is included as a portion of the embedded system to store operating system program code and data for operating the embedded system. Recently, embedded systems have begun to use flash memory for the non-volatile memory. Flash memory may advantageously be reprogrammed while also providing non-volatile storage of information.
FIG. 1 shows a one chip type of conventional embedded system 10 that employs flash memory. The embedded system 10 includes an embedded CPU 12 with system logic 14 and static RAM (SRAM) 16 for caching operations. Flash memory 18 provides non-volatile storage for information such as program code and data. A Flash process is used to fabricate the embedded system 10 on a single semiconductor die so that a block of Flash memory may be formed directly on the same semiconductor die. The one chip type of conventional embedded system advantageously does not require interface circuits between the Flash memory 18 and the CPU 12. However, using a Flash process for the entire embedded system 10 increases the cost of the system, decreases the speed performance, and increases the power consumption.
FIG. 2 shows a two chip type of conventional embedded system 20 that uses Flash memory. The embedded system 20 is fabricated using a digital process semiconductor die 22 and a Flash process semiconductor die 24. The digital process semiconductor die 22 may include an embedded CPU 26, system logic 28, SRAM 30, cache 32, and a cache controller 34. The Flash process semiconductor die 24 includes Flash memory 36 for providing non-volatile storage of information. The Flash memory may be connected to the digital process semiconductor die 22 through a standard interface 38 such as a serial interface or a parallel interface. The two chip type of conventional embedded system 20 may cost less and use less power than the one chip type due to using the lower cost digital process for a portion of the system. The speed performance of the two chip system may be increased by using the digital process for the embedded CPU 26, but decreased due to the standard interface 38 that connects the two semiconductor dies 22 and 24.